W_RYZENAI_CVML
Local Computer Vision with AMD Ryzen™ AI and CVML
General objective of the workshop
Discover how to develop local computer vision and perception applications using AMD Ryzen™ AI and the CVML library, while leveraging the GPU and NPU acceleration capabilities available on the platform.
Target audience
- AI and embedded systems engineers and developers
- C++ developers looking to integrate computer vision capabilities into their applications
- Image processing and computer vision engineers
- Software architects and technical project managers interested in exploring local perception capabilities on AMD Ryzen™ AI platforms
Prerequisites
- Basic knowledge of C++ programming
- General understanding of image processing or computer vision is recommended
- Familiarity with CMake and OpenCV is recommended but not required
- No prior experience with the AMD Ryzen™ AI CVML library is required
Workshop objectives
- Understand the role of the AMD Ryzen™ AI CVML library for local computer vision applications.
- Identify the main CVML perception capabilities, including face detection, depth estimation, and face mesh.
- Understand the basic CVML C++ programming model and inference workflow.
- Build and run CVML sample applications using GPU or NPU acceleration.
Workshop content
Day 1
- Introduction to AMD Ryzen™ AI and CVML {Lecture}
- CVML Architecture and Programming Model {Lecture}
- Demo 1 – Setting Up CVML and Building the Samples
- Demo 2 – Face Detection with CVML
- Demo 3 – Exploring Additional CVML Perception Features
Registration arrangements and access lead times
- Registration requests can be made online, by email or by phone.
- Registration is confirmed after subject to availability.
- A registration confirmation and the information necessary to attend the workshop are sent before the session begins.
Teaching staff
The training course is delivered by William Duluc, AMD Authorized Trainer since 2017, an electronics and telecommunications engineer, an expert in AMD technologies since 2009. His experience combines digital system design, FPGA and embedded software development, technical project management, and professional training on Xilinx and subsequently AMD technologies.
His main areas of expertise include:
- AMD FPGAs: VHDL and Verilog languages, RTL design, integration and validation of digital systems;
- AMD SoCs and MPSoCs: C/C++ development, hardware and software architectures, design and integration of embedded systems;
- AMD DSP and RFSoC: high-level synthesis (HLS), MATLAB/Simulink, digital signal processing and radio-frequency architectures;
- AMD Versal: AI Engines, adaptive architectures and heterogeneous system design.
Accessibility
People with disabilities are invited to contact MVD Training before registering so that possible training adjustments can be considered. Educational, technical, or organisational adaptations are reviewed on a case-by-case basis, taking into account the participant's needs, the technical requirements, and the training objectives. Where relevant, this review may be carried out with support from AGEFIPH.
Teaching resources
- Live virtual classroom delivered via Cisco Webex;
- Training materials provided in PDF format;
- Technical demonstrations conducted by the trainer;
Technical resources and equipment
- Computer running a 64-bit operating system;
- High-speed and stable internet connection;
- Webcam and headset with microphone;
- Cisco Webex application
Partner
MVD Training is an AMD Authorized Training Provider. Training courses are delivered by an AMD Authorized Trainer and are based on official AMD training materials.
Notes
This workshop is a technical presentation and demonstration service. It does not constitute a vocational training activity and does not include any assessment of learning outcomes or the issuance of a training certificate.