L_VHDL
VHDL Logical Synthesis and Simulation for AMD FPGA design
General training objective
Acquire the knowledge and skills required to design, synthesize, implement, and simulate digital architectures in VHDL on AMD FPGAs, by mastering the main FPGA hardware resources, RTL coding best practices, synchronous design, timing constraints, and simulation-based verification techniques.
Target audience
- Digital system designers;
- Electronics engineers wishing to develop RTL architectures in VHDL;
- Developers required to design, simulate, and implement digital functions on FPGAs;
- Engineers wishing to gain comprehensive knowledge of the FPGA design flow, from VHDL coding through simulation and timing analysis.
Prerequisites
- Have basic knowledge of digital electronics;
- Understand the principles of combinational and sequential logic.
Learning objectives and target skills
1 - Identify and make effective use of the main hardware resources of AMD FPGAs, including CLBs and slices, embedded memories, DSP blocks, I/O resources, clocking networks, and configuration mechanisms.
2 - Design and structure a synthesizable RTL architecture in VHDL, using entities and architectures, objects, data types, operators, concurrent and sequential statements, processes, as well as inference and instantiation mechanisms.
3 - Develop generic, scalable, and reusable VHDL modules, using variables, generics, attributes, functions, procedures, packages, and libraries.
4 - Implement a synchronous design and analyze its timing behavior, by applying FPGA-oriented design principles and using implementation, static timing analysis, and debugging tools.
5 - Develop and use VHDL simulation environments to verify the behavior of a design, using simulation-specific statements, simulation models and packages, ASCII files, and message-generation mechanisms.
Course content
Day 1
- Objective 1
- CLB and slices notion
- Dedicated RAM blocks and use modes
- Dedicated multipliers and DSP48 blocks
- In/Out blocks
- Clocks distribution, MMCMs and PLLs
- Configuration
Day 2
- Objective 2
- Notion of entity / architecture
- Concurrent and sequential instructions
- Predefined types and objects
- Predefined operators and of use extended by using standardized packages
- Concurrent instructions : when, with select, for generate
Day 3
- Objective 2
- Process
- Organization of design by functional modules
- Inference and instancing notions
- Precautions for an evolutionary and / or re-usable code
Day 4
- Objective 3
- Notion of variable and example of use
- Genericity and automatic configuration of re-usable modules
- Useful predefined attributes in logical synthesis
- Functions and procedures
- Definition of packages and libraries
- Objective 4
- Synchronous design
- Static timing analysis
- Implementation and tuning tools
Day 5
- Objective 5
- VHDL instructions specific to simulation
- Writing components models intended to make the simulation more realistic
- Use of existing models and simulation packages
- Writing and reading of ASCII files
- Generating information messages
Registration arrangements and access lead times
- Registration requests can be made online, by email or by phone.
- The prerequisites and the suitability of the training for the participant’s needs are verified by the trainer, by email or during a telephone interview.
- Registration is confirmed after the prerequisites have been checked and subject to availability.
- For inter-company sessions, registration is possible until 7 calendar days before the start of the course. Requests received after this deadline may be considered on a case-by-case basis, depending on organisational possibilities.
- For in-company sessions, the average lead time for implementation is approximately 2 months from the date of the request, depending on the availability of the client, the trainer and any adaptations required.
- A registration confirmation and the information necessary to attend the course are sent before the session begins.
Teaching staff
The training course is delivered by William Duluc, AMD Authorized Trainer since 2017, an electronics and telecommunications engineer, an expert in AMD technologies since 2009. His experience combines digital system design, FPGA and embedded software development, technical project management, and professional training on Xilinx and subsequently AMD technologies.
His main areas of expertise include:
- AMD FPGAs: VHDL and Verilog languages, RTL design, integration and validation of digital systems;
- AMD SoCs and MPSoCs: C/C++ development, hardware and software architectures, design and integration of embedded systems;
- AMD DSP and RFSoC: high-level synthesis (HLS), MATLAB/Simulink, digital signal processing and radio-frequency architectures;
- AMD Versal: AI Engines, adaptive architectures and heterogeneous system design.
Accessibility
People with disabilities are invited to contact MVD Training before registering so that possible training adjustments can be considered. Educational, technical, or organisational adaptations are reviewed on a case-by-case basis, taking into account the participant's needs, the technical requirements, and the training objectives. Where relevant, this review may be carried out with support from AGEFIPH.
Teaching resources
Inter-company online training:
- Live virtual classroom delivered via Cisco Webex;
- Training materials provided in PDF format;
- Technical demonstrations conducted by the trainer;
- Individual practical exercises carried out on a training workstation accessed remotely via RealVNC;
- Guidance and technical support provided by the trainer during the exercises.
Intra-company on-site training at the client’s premises: Equipment and logistical arrangements must be agreed with the client before the training course.
- Resources to be provided by the client:
- Suitable training room;
- Projector or presentation screen;
- Whiteboard;
- One computer per participant, equipped with the required AMD tools.
- Resources provided by MVD Training:
- Training materials in PDF format;
- Presentations, technical demonstrations and practical exercises;
- Files, examples and resources required for the practical exercises;
- Loan of computer equipment available upon request and subject to availability.
Technical resources and equipment
Inter-company online training:
- Computer running a 64-bit operating system;
- High-speed and stable internet connection;
- Webcam and headset with microphone;
- Cisco Webex application
AMD tools access arrangements:
The practical exercises are carried out using one of the following two options, as agreed with the trainer:
The practical exercises are carried out using one of the following two options, as agreed with the trainer:
- Option 1 – Remote access:
Use of the RealVNC Viewer application to access the practical training workstation made available remotely by MVD Training. - Option 2 – Local use:
Installation of the AMD software tools required for the training course on the participant’s computer. The version to be used must be specified and approved with the trainer before the start of the session.
Intra-company on-site training at the client’s premises:
- Computer running a 64-bit operating system;
- Installation of the AMD software tools required for the training course. The version to be used must be specified and approved with the trainer before the start of the session.
Teaching methods, assessment and recognition
- Teaching methods:
- A combination of theoretical instruction, technical questionnaires and practical exercises completed individually on a computer.
- Training monitoring:
- Attendance sheet signed by both the participant and the trainer.
- Assessment of learning outcomes and progress:
- Continuous assessment of learning outcomes and learner progress through technical quizzes, hands-on laboratory exercises, and trainer observation against the targeted competencies.
- Satisfaction assessment:
- At the end of the training course: satisfaction questionnaire completed by the participant.
- Three-month follow-up evaluation:
- Three months after the training course: questionnaire assessing how the acquired skills have been applied in the workplace.
- Training recognition:
- Training certificate stating the results of the learning assessment, issued to the participant.
- Certificate of completion issued to the employer or the organisation commissioning the training.
Partner
MVD Training is an AMD Authorized Training Provider. Training courses are delivered by an AMD Authorized Trainer and are based on official AMD training materials.
