Training Selection Guide
Find the right training for your need
Answer a few questions to get a recommendation from the MVD Training catalog.
This guide does not record any of your answers. It helps you identify the catalog training courses best suited to your needs, but does not replace reviewing your prerequisites and objectives with the trainer.
Advanced Vivado recommendations
Based on your answers, here are the most suitable training courses.
Main recommended training
Master Vivado Constraints, Timing Analysis, and Advanced Features
Static Timing Analysis (STA), Xilinx Design Constraints (XDC) and Advanced use of Vivado™
Understand XDC Timing constraints, Static timing analysis, good AMD FPGA design practice, advanced debug methods and advanced use of the Vivado™ Design Suite
- 12/07/2026
Complementary training courses
AMD FPGA architectures
Designing with the AMD UltraScale+™ Families (Spartan™ included)
Learn how to effectively use AMD UltraScale+™ architectural resources
RTL development with C/C++
High-Level Synthesis with the Vitis Unified IDE
Improve the productivity of components for Programmable Logic (FPGAs) using the Vitis™ HLS tool
- 09/14/2026 confirmed
Dual mastery of VHDL and Verilog
VHDL to Verilog and Verilog to VHDL
Acquire the knowledge and skills required to transition from VHDL to Verilog or from Verilog to VHDL, by mastering the equivalences between the two languages for RTL design, hierarchical module structuring, and testbench development.
Specialization - focused deep dive
FPGA/PL Partial reconfiguration
Designing with Dynamic Function eXchange (DFX) Using the Vivado™
Learn how to build et assembly reconfigurable partitions to configure partially et dynamically a AMD component
Multi-gigabit serial links
Designing with Serial Transceivers
Learn how to use serial transceivers in your UltraScale™, UltraScale+™ FPGA or Zynq™ UltraScale + MPSoC.
PCI Express
Designing an Integrated PCI Express System
Acquire the knowledge and skills required to design, configure, simulate, implement, and debug a PCI Express® interface on AMD FPGAs and SoCs, by mastering the PCIe protocol, associated IP solutions, and their integration into a system architecture.
Cannot find an exact match for your situation? We can adapt an existing training course or design a custom one. Contact us to discuss it.
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