Training Guidance -- MVD Training

Training Guidance

This page will help you find the most suitable training course, based on your current knowledge.

The information requested on this form is not saved.
The results of this questionnaire do not replace the study of your prerequisites and expectations by our trainer.
To obtain a study by our trainer, please use our registration form or our contact form.

1 - Your hardware target :

FPGA - Programmable Logic

2 - Knowledge of VHDL or Verilog :

YES

3 - Knowledge of Vivado :

YES

Result :

Advanced training to master Vivado and constraints :

Static Timing Analysis (STA), Xilinx Design Constraints (XDC) and Advanced use of Vivado™

Advanced training on partial reconfiguration :

Designing with Dynamic Function eXchange (DFX) Using the Vivado™

AMD FPGA architecture detailed trainings :

Designing with the AMD UltraScale™ and UltraScale+™ Families

Designing with the AMD 7-Series Families

Training on RTL block development with C/C++ (C/C++ to VHDL/Verilog) :

Vitis™ High Level Synthesis

Training for dual mastery of VHDL and Verilog :

Upgrading VHDL to Verilog and Verilog to VHDL

Specific training on multi-gigabit serial links (GT) :

Designing with Serial Transceivers

Specific training on PCI-Express core :

Designing an Integrated PCI Express System

1 - Your hardware target :

2 - Knowledge of VHDL or Verilog :

3 - Knowledge of Vivado :

Advanced training to master Vivado and constraints : Static Timing Analysis (STA), Xilinx Design Constraints (XDC) and Advanced use of Vivado™

Advanced training on partial reconfiguration : Designing with Dynamic Function eXchange (DFX) Using the Vivado™

AMD FPGA architecture detailed trainings : Designing with the AMD UltraScale™ and UltraScale+™ Families Designing with the AMD 7-Series Families

Training on RTL block development with C/C++ (C/C++ to VHDL/Verilog) : Vitis™ High Level Synthesis

Training for dual mastery of VHDL and Verilog : Upgrading VHDL to Verilog and Verilog to VHDL

Specific training on multi-gigabit serial links (GT) : Designing with Serial Transceivers

Specific training on PCI-Express core : Designing an Integrated PCI Express System